Desain dan Evaluasi Determinisme Arsitektur Hybrid MCU-FPGA Pada Open-Smartwatch Untuk Sistem Real-Time

Anjani Maulaya Nunqaf, Prof. Dr. Ir. Jazi Eko Istiyanto, M.Sc. ; Muhammad Husni Santriaji S.Si., M.T., M.S., Ph.D.

2026 | Tesis | MAGISTER ELEKTRONIKA DAN INSTRUMENTASI

Penelitian ini mengusulkan desain dan evaluasi arsitektur hybrid berbasis mikrokontroler (MCU) dan Field-Programmable Gate Array (FPGA) pada platform Open-Smartwatch untuk meningkatkan determinisme sistem real-time dalam pemrosesan sinyal fisiologis. Permasalahan utama pada arsitektur software-centric berbasis MCU adalah keterbatasan paralelisme yang menyebabkan tingginya utilisasi CPU, peningkatan latency, serta munculnya jitter dan potensi deadline miss pada frekuensi sampling tinggi. Untuk mengatasi hal tersebut, penelitian ini menerapkan pendekatan hardware-software co-design dengan mendistribusikan beban komputasi antara MCU dan FPGA. Modul pemrosesan sinyal detak jantung berbasis PPG dan mekanisme keamanan berbasis HMAC-SHA256 diimplementasikan dalam beberapa skenario partisi sistem, termasuk variasi lokasi akuisisi data dan protokol komunikasi (SPI dan I2C).

Sebanyak lima Konfigurasi  arsitektur hybrid dirancang dan dievaluasi berdasarkan parameter performa, yaitu latency, latency, CPU utilization, jitter, dan deadline miss ratio. Implementasi pada FPGA Cyclone V menunjukkan bahwa offloading komputasi intensif ke FPGA mampu menurunkan beban CPU secara signifikan serta meningkatkan headroom sistem. Selain itu, arsitektur hybrid tertentu mampu meningkatkan determinisme dengan mengurangi jitter dan memastikan eksekusi real-time yang lebih konsisten dibandingkan pendekatan software-only.

Hasil penelitian menunjukkan bahwa pendekatan hybrid MCU–FPGA efektif dalam meningkatkan efisiensi komputasi dan determinisme sistem wearable real-time. Penelitian ini memberikan kontribusi berupa eksplorasi desain arsitektur hybrid secara komprehensif pada platform Open-Smartwatch serta menjadi referensi dalam pengembangan sistem wearable berbasis hardware acceleration

This study proposes the design and evaluation of a hybrid architecture based on a microcontroller (MCU) and Field-Programmable Gate Array (FPGA) on the Open-Smartwatch platform to improve system determinism in real-time physiological signal processing. The main limitation of the software-centric MCU-based architecture lies in its sequential execution model, which leads to high CPU utilization, increased latency, as well as jitter and potential deadline misses at high sampling rates. To address these issues, a hardware-software co-design approach is implemented by distributing computational workloads between the MCU and FPGA. Heart rate signal processing based on PPG and a security mechanism using HMAC-SHA256 are deployed across multiple system partitioning scenarios, including variations in data acquisition location and communication protocols (SPI and I2C).

Five hybrid architecture configurations are designed and evaluated using performance metrics such as latency, latency, CPU utilization, jitter, and deadline miss ratio. Implementation on a Cyclone V FPGA demonstrates that offloading computationally intensive tasks to hardware significantly reduces CPU load and increases system headroom. Furthermore, certain hybrid configurations improve system determinism by reducing jitter and ensuring more consistent real-time execution compared to the software-only approach.

The results indicate that the MCU–FPGA hybrid approach effectively enhances computational efficiency and system determinism in wearable real-time systems. This study contributes a comprehensive exploration of hybrid architecture design on the Open-Smartwatch platform and provides a reference for developing hardware-accelerated wearable systems.

Kata Kunci : FPGA, Open-Smartwacth, Hardware Accelerator, Arsitektur Hybrid FPGA, Determinisme